What is meant by load shedding?

The network is monitored by the network monitoring systems. These systems need to be robust and must be capable of inevitably coping with the situations in which the overload occurs. The network gets overloaded because of the nodes generating large volumes of data at high rates. Overload might also occur because of the burstiness of the traffic in its normal course of operation. For reducing the load of the network, load shedding techniques are applied. 

- Load shedding techniques have to be followed if the network is under a lot of stress. 

- This has to be done while monitoring the network for avoiding the packet loss that otherwise might be uncontrollable. 

- Load shedding involves sampling the incoming traffic. 

- CoMo or continuous monitoring has been developed to serve this purpose. 

- It uses such a load shedding scheme which can infer the query’s cost using the relation between the set of features of the traffic and the actual resource usage without having any knowledge of the plug-ins. 

- Here, traffic feature can be defined as a counter describing the incoming traffic’s particular property. 

The property might be any of the following:

Ø  Number of packets

Ø  Number of bytes

Ø  Flows

Ø  Unique IP destination address and so on.

- The CoMo consists of a prediction and the load shedding sub-system for intercepting the packets prior to sending them to the plug-in from the filter.

- A traffic query is implemented by this plug-in. 

- The system completes the process in 4 phases. 

- In the first phase, it forms a batch of packets for each 100ms of the traffic. - It then processes each of these batches for extracting a predefined traffic features’ set that is quite large. 

- From these, the most relevant sets are selected by the feature selection sub-system based up on the present stats of the CPU usage of the query. 

- The selected subset is then supplied as input for the “multiple linear regression subsystem”. 

- This is done for the prediction of the CPU cycles that the query requires for processing the whole batch. 

- If the prediction is greater than the capacity of the system, the batch is pre-processed by the load shedding subsystem for discarding the packet’s portion. 

- The batch is discarded through packet or flow sampling. 

Load shedding is now being seen as an effective method for curbing the overload situations even in the real time systems. 

- It involves shedding excess of the load in such a way that the stability of the system is not disturbed and also the system buffers do not experience any overflows. 

- The idea for applying the technique of load shedding in the field of networking has been adopted from the concept of the electric power management.

- Here, the electric current is intentionally disconnected on particular lines when the demands for the power supply are higher than what is being supplied.

- CoMo is an open source system and can be quickly implemented and can be used for further deploying other network monitoring applications. 

- The system has been written using C language and uses a feature rich API. 

- The system works by predicting the CPU usage of the system and thus anticipates about the resource requirements bursts that might occur in future. 

- The load shedding scheme used by the CoMo has the capability of automatically identifying the features using which the resource usage can be best modeled for each monitoring application.

- This identification is made according to the previous resource usage measurements. 

- These measurements are then used for determining the system’s overall load and by what percentage the load must be shed. 

What is Polling?

- Polling is often referred to as the polled operation.

- When the statuses of the external devices are actively sampled by a client program just like a synchronous activity is referred to as the polling. 

- The common use of the polling is in the input and output operations. 

- In rare cases, polling is also called as the software driven I/O or just simply as polled I/O. 

- As and when required, polling is also carried out with the busy waiting synonymous. 

- Polling is then referred to as the busy–wait polling. 

- In this case whenever it is required to carry out an input/ output operation, the system just checks the status of the device required for fulfilling this operation until it is idle. 

- When it becomes idle it is accessed by the I/O operation. 

- Such polling may also refer to a state in which the status of the device is checked again and again for accessing it if idle. 

- If the device is occupied, the system is forced to return to some other pending task. 

- In this case the CPU time is wasted less when compared to what happens in busy waiting. 

- However, this is not a better alternative to interrupt driven I/O polling. 

- In single purpose systems that are too simple, using busy-wait polling is perfectly fine if the system cannot take any action until the I/O device has been accessed. 

- But traditionally, the polling was thought to be a consequence of the operating systems and simple hardware that do not support multitasking. 

- The polling works intimately with the low level hardware usually. 

- For example, a parallel printer port can be polled for checking whether or not it is ready for printing another character. 

- This involves just the examination of a bit. 

- The bit to be examined represents the high or low voltage stage of the single wire in the cable of the printer during the time of reading. 

- The I/O instruction by which this byte is read is also responsible for transferring the voltage state directly to the eight flip flops or circuits. 

- These 8 flip flops together constitute one byte of a register of CPU. 

Polling also has a number of disadvantages. 

- One is that there is limited time for servicing the I/O devices. 

- Polling has to be done within this time period only. 

- But in some cases there are many devices to be checked which cause the polling time to exceed the given limit. 

- The host keeps on hitting the busy bit until the device becomes idle or clear. 

- When the device is idle, the state is written in to the command register and also in the data out register. 

- The command ready bit is set to 1. 

- The controller sets the busy bit once it knows that the command ready bit has been set.  

- After reading from the command register, the controller carries out the required I/O operation on the device. 

- On the other hand, if the read bit has been set to one, the controller loads the device data in to the data in register. 

- This data is further read by the host. 

- Once the whole action has been completed, the command ready bit is cleared by the controller. 

- The error bit is also cleared for showing that the operation has been completed successfully. 

- At the end the busy bit is also set.

- Polling can be seen in the terms of master slave scenario where the master sends inquiring about the working status slave devices i.e., whether they are clear or engaged. 

Explain the Priority CPU scheduling algorithm

A number of scheduling algorithms are available today and all are appropriate for some different kinds of scheduling environments. In this article we give a brief explanation about the ‘priority CPU scheduling algorithm’. 

For those who are not familiar with this scheduling algorithm, a special case of the priority algorithm is the shortest job first scheduling algorithm (SJF). 

- This algorithm involves associating a priority with each and every thread or process. 

- Out of all the processes, the one with the highest priority is chosen and given to the processor for execution. 

- Thus, it is decided by the priority that which process has to be executed first. 

- There are cases when the two or more processes might have the same priority. 

- In such case FCFS (first come first served) scheduling algorithm is applied. 

- The process first in the queue is then executed first. 

- The SJF is essentially a modification of the priority algorithm. 

- Here, the priority of a process (indicated by p) is simply taken as the inverse of the following CPU burst as predicted. 

- This implies if a process is having a large CPU burst, then its priority will be low accordingly and similarly if the CPU burst is small, the priority will be high. 

- Numbers in some fixed range are used for indicating the priorities such as from 0 to 4095 or from 0 to 7 etc. 

- One thing to be noted is that there has been no general agreement up on whether the number 0 indicates lowest priority or highest priority.

- In some systems the lower priorities are indicated by the low numbers while in some systems low numbers mean higher priorities. 

- The latter case i.e., using low numbers for representing high priorities is more common.

For example, consider the 5 processes P1, P2, P3, P4 and P5 having CPU burst as 10, 1, 2, 1, 5 respectively and priority also respectively as 3, 1, 4, 5, 2. Using the priority scheduling algorithms, the processes will be executed in the following order:

P2, P5, P1, P3, P4

There are two ways of defining the priorities i.e., either externally or internally. This gives two types of priorities:

1. Internally defined priorities: These priorities make use of some quantities that can be measured for computing a process’s priority. These quantities include memory requirements, time limits, ration of the I/O burst and CPU burst, number of files and so on.
2. Externally defined priorities: These priorities are defined by some criteria that are external to the operating system. Such factors include political factors, department leading the work; importance of the process, amount of money paid and so on.

The priority scheduling can be itself divided in to two types namely non – preemptive or preemptive. The priority of the process waiting in the ready queue is compared with that of the executing process.

Ø  Preemptive priority scheduling: Here the CPU is preempted if the waiting process has a priority higher than that of the currently executing process.

Ø  Non – preemptive priority scheduling: Here the new process will be let waiting in the ready queue till the execution of the current process is complete.

Starvation or the indefinite blocking presents a major problem in priority scheduling. A process will be considered blocked if it is ready for execution but has to wait for CPU. It is very likely that the low priority processes will be left waiting indefinitely for CPU. In a system that is heavily loaded most of the time, if the number of high priority processes is large, the low priority processes will be prevented from getting processor. 

Explain the Round Robin CPU scheduling algorithm

There are number of CPU scheduling algorithms, all having different properties thus making them appropriate for different conditions. 

- Round robin scheduling algorithm or RR is commonly used in the time sharing systems. 

- This is the most appropriate scheduling algorithm for time sharing operating systems. 

- This algorithm shares many similarities with the FCFS scheduling algorithm but there is an additional feature to it. 

- This feature is preemption in the context switch occurring between two processes. 

- In this algorithm a small unit of time is defined and is termed as the time slice or the time quantum. 

- These time slices or quantum range from 10ms to 100 ms.

- The ready queue in round robin scheduling is implemented in a circular fashion. 

How to implement Round Robin CPU scheduling algorithm

Now we shall see about the implementation of the round robin scheduling:

1. The ready queue is maintained as the FIFO (first in first out) queue of the processes.
2. Addition of new processes is made at the rear end of the ready queue and selection of the process for execution by the processor is made at the front end.
3. The process first in the ready queue is thus picked by the CPU scheduler. A timer is set that will interrupt the processor when the time slice elapses. When this happens the process will be dispatched.
4. In some cases the CPU burst of some processes may be less than the size of the time slice. If this is the case, the process will be voluntarily released by the CPU. The scheduler will then jump to the process next in the ready queue and fetch it for execution.
5. While in other cases the CPU burst for some processes might be higher than the size of the time slice. In this case the timer set will send an interrupt to the processor, thus dispatching the process and putting it at the rear end of the ready queue. The scheduler will then jump to the next process in the queue.

- The waiting time in round robin scheduling algorithm has been observed to be quite long at an average rate. 

- In this algorithm, not more than one time slice can be allocated to any process under any conditions in a row. 

- However, there is an exception to this if there is only one process to be executed.

- If the CPU burst is exceeded by the process, the process is put back at the tail of the queue after preemption.

- Thus, we can call this algorithm as a preemptive algorithm also. 

- The size of the time quantum greatly affects the performance of the round robin algorithm.

- If the size of the time quantum is kept too large then it resembles the FCFS algorithm. 

- On the other hand if the quantum is of too small size, then this RR approach is called the processor sharing approach. 

- An illusion is created in which it seems every process has its own processor that runs at the fraction of the speed of the actual processor. 

- Further, the effect of the context switching up on the performance of the RR scheduling algorithm.

- A certain amount of time is utilized in switching from one process to another. 

- In this time the registers and the memory maps are loaded, a number of lists and tables are updated; memory cache is flushed and reloaded etc.

- Lesser the size of the time quantum, context switching will occur more number of times. 

What is Process State Diagram?

In the systems where multiple processors or multitasking is involved, a process has to go through a number of states. In this article we shall discuss about these states. 

The kernel of the operating system may not recognize these states distinctly but still for the understanding of how the processes are executed they act as useful abstractions. 

These various states can be looked up in a process state diagram for a systematic view. This diagram shows the transitions of the process between various states with arrows. Processes can be stored both in the secondary or virtual memory and in the main memory as per the situation.

Process States

- The primary process states occur in all types of the systems. 

- Processes in these states are usually stored in the main memory. 

Basically there are 5 major states of any process as discussed below:

Ø  Created: 

- It is also known as the ‘new’ state. 

- A process occupies this state up on it creation. 

- While waiting for being admitted to the next ready state this process lies in this state. 

- The admission scheduler will decide whether to admit the process to next state or to delay it on a short or long term. 

- However, this admission is approved in an automatic way in most of the desktop computers. 

- But in the systems with real time operating systems this is not true. 

- Here, the admission might be delayed by a certain amount of time.

- If too many states are admitted to the ready state in a real time operating system, condition of over contention and over saturation might occur disabling the system to meet its deadlines.

Ø  Ready or Waiting: 

- This state is taken up a process when it has been loaded in to the physical memory of the system and is waiting to be executed by the processor or precisely waiting to be context switched by the dispatcher. 

- At any instant of time there might be a number of processes waiting for their execution. 

- Here the processes have to wait in a queue called the run queue out of which only one process will be taken up by a processor. 

- Processes that are waiting for obtaining input from some event are not put in to this ready queue.

Ø  Running: 

- When a process is selected by the CPU for execution, its state is changed to running. 

- One of the processors executes the instructions of the process one by one. 

- Only one process can be run by the process at a time.

Ø Blocked: 

- When a process is blocked because of some event such as I/O operations is put in to the blocked state. 

- Another reason for a process being a blocked state can be its running out of the CPU time allocated to it.

Ø  Terminated: 

- Termination of a process may occur when either its execution is complete or it has been explicitly killed.

- This state is called the terminated or halted. 

- This process is called a zombie process if after coming in the terminated state it is not removed from the main memory. 

There are two additional states for supporting the virtual memory. In these states the process is usually stored in the secondary memory of the system:

Ø Swapped out or Waiting: 

- A process is said to be swapped out when it is removed from the primary memory and placed in the secondary memory. 

- This is done by the mid - term scheduler. 

- After this the state of this process changes to waiting.  

Ø  Swapped out and Blocked:

- In some cases, the processes that were in blocked state might be swapped out. 

- The same process might be again swapped in providing the conditions remain the same.

What is CPU Scheduling Criteria?

Scheduling is an essential concept that serves in the multitasking, multiprocessor and distributed systems. There are several schedulers available for this purpose. But these schedulers also require a criterion up on which they can decide how to schedule the processes. In this article we discuss about these scheduling criteria. Today a number of scheduling algorithms are available and all these have different properties. This is why these may work up on different scheduling criteria. Also the chosen algorithm may favor one class of processes more than the other.

What Criteria is used by algorithms for Scheduling?

Below mentioned are some of the criteria used by these algorithms for scheduling:
1. CPU utilization:
- It is a property of a good system to keep the CPU as busy as possible all the time.
- Thus, this utilization ranges from 0 percent to 100 percent.
- However, in the systems that are loaded lightly, the range is around 40 percent and for the systems heavily loaded it ranges around 90 percent.

2. Throughput:
- The work is said to be done if the CPU is busy with the execution of the processes.
- Throughput is one measure of CPU performance and can be defined as the number of processes being executed completely in a certain unit of time.
- For example, in short transactions throughput might range around like 10 processes per second.
- In longer transactions this may range around only one process being executed in one hour.

3. Turnaround time:
- This is an important criterion from the point of view of a process.
- This tells how much time the processor has taken for execution of  a processor.
- The turnaround time can be defined as the time duration elapsed from the submission of the process till its completion.

4. Waiting time:
- The amount of time taken for the process for its completion is not affected by the CPU scheduling algorithms.
- Rather, these algorithms only affects the time when the process is in waiting state.
- The time for which the process waits is called the waiting time.

5. Response time:
- The turnaround is not a good criterion in all the situations.
- The response time is favorable in the case of the interactive systems.
- It happens many a times that a process is able to produce the output in a fairly short time compared to the expected time.
- This process then can continue with the next instructions.
- The time taken for a process from its submission till production of the first response is calculated as the response time and is another criterion for the CPU scheduling algorithms.

All these are the primary performance criteria out of which one or more can be selected by a typical CPU scheduler. These criteria might be ranked by the scheduler depending up on their importance. One common problem in the selection of performance criteria is the possibility of conflict ion between them.
For example, increasing the number of active processes will increase the CPU utilization but at the same time will decrease the response time. This is often desirable to produce reduction in waiting time and turnaround time also. In a number of cases the average measure is optimized. But there are certain cases also where it is more beneficial to optimize the maximum or the minimum values.
It is not necessary that a scheduling algorithm that maximizes the throughput will decrease the turnaround time. Out of a mix of short and long jobs, if a scheduler runs only the short jobs, it will produce the best throughput. But at the same time the turnaround time for the long jobs will be so high which is not desirable.

Define the Virtual Memory technique?

Modern operating systems come with multitasking kernels. These multitasking kernels often run in to the problems related to memory management. Physical memory does not suffice for them to execute the tasks assigned to them because of being fragmented. So they have to take some additional from the secondary memory. But they cannot use this memory directly. Virtual memory offers a solution to this problem. 

What is Virtual Memory technique?

- Using this technique makes the fragmented main memory available to the kernels as a contiguous main memory. 

- Since it is really not the main memory but just appears to be, it has been named as the virtual memory and this technique is called the virtual memory technique. 

- Since, it helps in managing the memory, it is essential a memory management technique. 

- The main storage gets fragmented because of many programming and processing problems. 

- The main memory available to the processes and the tasks is virtualized by the virtual memory technique and then it appears to the process as a contiguous memory location. 

- This memory is a global address space. 

- Virtual address spaces such as these are managed by the operating system. 

- The real memory is assigned to the virtual memory by the operating system itself. 

- The virtual addresses of the allocated virtual address spaces are translated in to the physical addresses automatically by the CPU. 

- It achieves this with the help of some memory management hardware specially designed for this purpose. 

- The processes continue to execute uninterrupted as long as this hardware properly translates the virtual addresses in to real memory addresses properly. 

- If it fails in doing so at any point of time, the execution comes to a halt and the control is transferred to the operating system. 

- The duty of the operating system now is to move the requested memory page to the main memory from the backing store. 

- Once done with this, it then returns the control again to the process that was interrupted. 

- It greatly simplifies the whole execution process. 

- Even if the application would require more data or code that would fit in real memory, it does not have to be moved to and fro between the backing store and the real memory. 

- Furthermore, this technique also offers protection to the processes that are provided distinct address spaces by the isolation of the memory allocate to them from other tasks.

- Application programming has been made a lot easier with the help of the virtual memory technique since it hides the fragmentation defects of the real memory. 

- The burden of memory hierarchy management is delegated to the kernel which eliminates the need for the explicit handling of the overlays by the program. 

- Thus each process can execute in an address space that is dedicated to it. 

- The need for relocating the code of the program is obviated along with using relative addressing for accessing the memory. 

- The concept of virtual memory was generalized and eventually named as memory virtualization. 

- Gradually, the virtual memory has become an inseparable part of the architecture of the modern computers. 

- For implementing it, dedicated hardware support is absolutely necessary. 

- This hardware is built in to the CPU in some sort of memory management hardware. - If required for boosting the performance of the virtual memory, some virtual machines and emulators may employ some additional hardware support. 

- The older mainframe computers did not have any support for the virtual memory concept. 

- In virtual memory technique, each program can solely access the virtual memory.

What is the Process Control Block? What are its fields?

The task controlling block, switch frame or task struct are the names of one and the same thing that we commonly called as the PCB or the process control block. 

- This data structure belongs to the kernel of the operating system and consists of the information that is required for managing a specific process. 

- The process control block is responsible for manifesting the processes in the operating system. 

- The operating system needs to be regularly informed about resources’ and processes’ statuses since managing the resources of the computer system for the processes is a part of its purpose. 

- The common approach to this issue is the creation and updating of the status table for every process and resource and objects which are relevant such as the files, I/O devices and so on:

1.  Memory tables are one such example as they consist of information regarding how the main memory and the virtual or the secondary memory has been allocated to each of the processes. It may also contain the authorization attributes given to each process for accessing the shared memory areas.

2.   I/O tables are another such example of the tables. The entries in these tables state about the availability of the device required for the process or of what has been assigned to the process. the status of the I/O operations taking place is also mentioned here along with address of the memory buffers they are using.

3.   Then we have the file tables that contain the information regarding the status of the files and their locations in memory.

4. Lastly, we have the process tables for storing the data that the operating systems require for the management of the processes. The main memory contains at least a part of the process control block even though its configuration and location keeps on varying with the operating system and the techniques it uses for memory management.

- Physical manifestation of a process consists of program data areas both dynamic and static, instructions, task management info etc. and this is what that actually forms the process control block. 

- PCB has got a central role to play in process management. 

- Operating system utilities access and modify it such as memory utilities, performance monitoring utilities, resource access utilities and scheduling utilities etc. 

- The current state of the operating system is defined by the set of process control blocks. 

- It is in the terms of PCBs that the data structuring is carried out. 

- In today’s sophisticated operating systems that are capable of multi-tasking, many different types of data items are stored in process control block. 

- These are the data items that are necessary for efficient and proper process management. 

- Even though the details of the PCBs depend up on the system, the common parts can still be identified and classified in to the following three classes:

1.  Process identification data: This includes the unique identifier of the process that is usually a number. In multi-tasking systems it may consists of user group identifier, parent process identifier, user identifier and so on. These IDs are very much important since they let the OS cross check with the tables.

2.   Process state data: This information defines the process status when it is not being executed. This makes it easy for the operating system to resume the process from appropriate point later. Therefore, this data consists of CPU process status word, CPU general purpose registers, stack pointer, frame pointers and so on.

3.   Process control data: This includes process scheduling state, priority value and amount of time elapsed since its suspension. 

What is DRAM? In which form does it store data?

The random access memory is of two types out of which one is dynamic random access memory or DRAM and the other one is SRAM or static random access memory. 

Here we shall focus up on the first type i.e., the Dynamic RAM. 

What is Dynamic Random Access Memory (DRAM)?

- In dynamic RAM, each bit of the data is stored in a separate capacitor. 

- All these capacitors are housed within an IC (integrated circuit).

- These capacitors can be in either of the two states:

1. Charged and
2. Discharged

- The two values of a bit are represented by means of these two states only. 

- The two values of bit are 0 and 1. 

- However, there is a disadvantage of the dynamic RAM. 

- These capacitors tend to leak charge and therefore may lose all the stored information. 

- Therefore, it is very important to keep the capacitors flushing with fresh charge. 

- They are refreshed at regular intervals of time. 

- It is because of this refreshing requirement this type of RAM has been named so. 

- The main memory or the physical memory of the CPU is constituted of this dynamic RAM only.

- Apart from desktops, DRAM is also used in workstation systems, laptops, video game consoles etc. 

- The structural simplicity is one of the biggest advantages of the DRAM. 

- For each bit it only requires one capacitor and one transistor, whereas SRAM requires 4 to 6 transistors for the same purpose. 

- This enables the dynamic RAM to attain very high density. 

- DRAM is a volatile memory unlike the flash memory and so it loses data whenever the power supply is cut.

- The capacitors and the transistors it uses are extremely small and so billions of them can be easily be integrated in to one single memory chip.

- DRAM consists of array of charge storage cells arranged in a sort of rectangular way. 

- Each of the cells consists of one transistor and one capacitor. 

- Word lines are the horizontal lines that connect the rows with each other. 

- Two bit lines compose each of the columns of cells. 

- These lines are called the + and – bit lines.

- It is specified by the manufacturers that at what rate the storage cell capacitors are to be refreshed. 

- Typically, it is less than or equal to 64 ms. 

- The DRAM controller consists of the refresh logic that is responsible for automating the periodic refresh. 

- This job cannot be done by any other software and hardware. 

- Thus, the circuit of the controller is very complicated. 

- The capacity of DRAM per unit surface is greater than that of the SRAM. 

- Some systems may refresh one row at one instant while others may refresh all the rows simultaneously every 64 ms.  

- Some systems use an external timer based up on whose timing they refresh a part of the memory. 

- Many of the DRAM chips come with a counter that keeps track of which row is to be refreshed next.

- However, there are some conditions under which the data can be recovered even if the DRAM has not been refreshed since few minutes. 

- Bits of the DRAM might flip to opposite state spontaneously because of the electromagnetic interference in the system. 

- Background radiation is the major cause for the occurrence of the majority of the soft errors.

- Because of these errors the contents of the memory cells may change and circuitry might be harmed. 

- Redundant memory bits along with the memory controllers are one potential solution to this problem. 

- These bits are within the modules of the RAM. 

- The parity is recorded by these bits which enable the reconstruction of the missing data via ECC or error – correcting code.

What is a Dispatcher?

A number of types of schedulers are available that suit the different needs of different operating systems. Presently, there are three categories of the schedulers:

1. Long-term schedulers
2. Medium-term schedulers
3. Short-term schedulers

Apart from the schedulers there is one more component involved in the scheduling process and is known as the dispatcher. 

- It is the dispatcher that gives a process power to control the CPU. 

- To which process this control is to be given is selected by the short-term scheduler. 

- This whole process involves the following three steps:

1. Switching the context
2. Turning on the user code
3. Making a jump to the exact location of the program from where it has to be restarted.

- Values taken from the program counter are analyzed by the dispatcher and accordingly it fetches instructions and feeds data in to the registers. 

- The dispatcher unlike the other system components needs to be very quick since it is invoked during all the switches that occur. 

- Whenever a context switch is invoked, the processor gets in to an idle state for a very small period of time. 

- Hence, it is required that the context switches that are not necessary might be avoided. 

- The dispatcher takes some time for stopping one process and start running the other one. 

- The dispatch latency is what we call this time.

- Scheduling and dispatch are complex processes and interrelation to each other. 

- These two are very much essential for the operation of the operating system. 

- Today, architectural extensions are available for the modern processors that provide a number of banks of registers.

- Swapping of these registers in hardware is possible and therefore a certain number of tasks are capable of retaining their full registers. 

- Whenever an interrupt triggers the dispatcher, it sends to it the full set of the registers belonging to the process that was being executed at the time of occurrence of the interrupt. 

- Here, the program counter is not considered. 

- Therefore, it is important that the dispatcher should be written carefully for storing the present states of the registers on being triggered. 

- In other words, we can say that for the dispatcher itself, there is no immediate context. 

- This saves it from the same problem. 

Process of Dispatcher

Below we try to describe in simple words what actually the process is.

1. The program presently having the context is executed by the processor. Things used by this program include stack base, flags, program counter, and registers and so on. There is a possible exception of the reserved register that is native to the operating system. The executing program does not have any knowledge regarding the dispatcher.
2. For dispatcher a timed interrupt is triggered. Here the program counter jumps to the address listed in the BIOS interrupt. This marks the beginning of the execution of the dispatch sub routine. The dispatcher then deals with the stacks and the registers etc. of the program that raised the interrupt.
3. Dispatcher like the other programs consists of some sets of instructions that operate up on the register of the current program. These instructions know everything of the previously executed programs. Out of these, the first few instructions are responsible for storing the state of the program.
4. Dispatcher next determines which program should be given the CPU next for executing. Now it deletes all the statistics of the previously executed state and fills in the details of the next process to be executed.
5. Dispatcher jumps to the address mentioned in the program counter and establishes a full context on the processor.

- Actually dispatcher does not really require registers since its only work is to write the current state of the CPU in to a memory location that has been predetermined. 

- It then loads in to the CPU another process from other predetermined location.